Welcome to this deep dive. Today. We're digging into analog circuit design, specifically around the year twenty ten.
Yeah, we've got this great collection of discussions from the ACD workshop back.
Then, and our mission really is to pull out the key developments the future ideas across well three main areas.
That's robust design, Sigma delta converters, and RFID exactly.
Think of this as like your shortcut to understanding some pretty complex stuff without getting totally bogged down. You might find some surprising things here.
It's a fascinating snapshot. Really, twenty ten was a pivotal moment. Nanoscale CMOS was becoming real.
Which open doors but also threw up new roadblocks totally.
So we'll look at how engineers were tackling robustness in that new world, the cool stuff happening in data conversion with signa deltas, and you know, the whole RFID universe started to expand.
Perfect. Okay, let's start with robust design. That was clearly a huge theme. Everyone was pushing for smaller features, you know, ninety nimeters even smaller, and.
That unlocked amazing things. But yeah, the obstacles were real. It's where the physics, the tiny atomic level stuff really started hitting circuit design hard.
So engineers couldn't just use the old bulk models anymore.
Pretty much, the designs got way more complex, which stretched out time to market. And then there's the variability. The transitionors themselves just weren't perfectly identical.
Anymore, leading to mismatch, lower yields.
Exactly, and reliability over time became a bigger worry too, things like hot carriers NbTi. Basically the circuits degrading.
Negative bias, temperature instability. That one sounds like a nightmare for designers. And you mentioned even the physical layout got trick.
Here, Oh yeah, more rules, tighter constraints, and these optical proximity effects started messing with the shapes they were trying to print on the silicon.
So the manufacturing process itself added challenges. But robustness wasn't just about nanoscale, was it. There was this push for circuits and really tough environments too.
Absolutely a big one was high temp, high voltage electronics, I think electric and hybrid vehicles which were just starting to take off. Their challenge there was making sure everything worked together reliably. The silicon, the packaging the materials. It needed complex simulations, thermal electric stuff, reliability calculations, especially for the smart power modules.
And they were making real progress. I saw mentions of igbt's handling pretty extreme temperatures.
Yeah, junction temps up to one hundred and seventy five degree C, sometimes even near two hundred C in short circuit tests.
Wow, that's incredibly hot. Must have involved some serious trade offs between cooling and performance for sure.
And this need for high temp electronics wasn't just in the main powertrain. It was sensors, motors all over the.
Vehicle, different power levels, different integration approaches.
Right, monolithic versus multi chip modules. Yeah, that was a big decision point for reliability too. The whole thing was guided by tough auto industry standards like AECQ one oh one.
It makes sense make sure your car works reliably hot or cold, Okay. Another hostile environment mentioned was radiation space for example. That sounds totally different it is.
You've got cumulative damage over time and also these single hits from hy energy particles.
Nasty stuff.
But what's interesting is that researchers were finding ways to use standard commercial CMOS. Turns out with the gate oxides getting thinner, like around five nanometers. Yeah, the threshold voltage shift from radiation became almost negligible for a lot of uses.
Really, so you didn't always need special expensive rad hard processes.
Not always. It wasn't perfect, mind you. There were still issues like with the STI oxide leakage varying a lot.
Okay, so still burdles.
But they developed clever layout tricks, things like ring sources guard rings basically protective structures around their transistors.
To shield them a bit sort of.
Yeah, improve the tolerance to the total radiation dose. And then for those single particle hits, especially in memory.
Like bitflips and surround exactly.
They use techniques like redundancy special cell designs like the Whittaker cell DICE architectures, although DICE E was showing limits in newer technologies.
And things like triple modular redundancy error correction codes.
Yeah, TMR and EEDAC were key strategies too, especially for protecting against those single event upsets.
Okay, some smart design to fight back against cosmic rays fascinating. And the third tough environment electromagnetic compatibility EMC.
Especially for power switches.
Absolutely critical. You pack more and more electronics into a car. They can't interfere with each other. That's a safety thing, right. So the trend was towards simulating this stuff earlier, using techniques like direct power injection testing, but doing it in the simulation world to.
Predict problems before building.
The chip exactly. And a key technique was optimizing the impedance of the pins on those smart power switches to make them less susceptible. So designing the chip to be a good neighbor in that noisy electrical environment makes sense. Okay, shifting focus a bit, let's talk reliability more broadly in nanoscale cmos, not just extreme conditions but everyday stress.
Right, So a big part was modeling that long term degradation hot carriers and BTI.
Again, how do they model it.
They'd simulate how transistors behaved under typical signal stress and then use models to kind of extrapolate how much they'd degrade over the chip's.
Lifetime, like accelerated aging, but in simulation pretty much.
Yeah, helps find the weak spots early.
Smart And what about dealing with manufacturing variations, because no two chips are ever exactly the same?
True? That process variability was a big headache. One approach was post fabrication.
Calibration, tuning the chip after it's made.
Yeah, Like the example was using switching sequence post adjustment on a DC. Yeah, they could tune it up and actually use less chip area to get the same accuracy.
Clever, And then there were techniques for adapting while the circuit.
Is running right runtime self adaptation. The example was a lot N driver with extra backup transistors like spares kind of. It had a monitor circuit that could switch in replacements if others started to degrade, keeps performance.
Stable, but that takes up more space.
I guess, yeah, there's always a trade off area versus resilience.
Okay, Now this was also when hike metal gate technology was coming in. How did that change the variability picture?
It was a mixed bag. It helps with some variability sources like random dope fluctuations, but it introduced new ones like the high material wasn't perfectly uniform, granularity issues and variations in the metal gates work function.
So solved one problem created another.
A bit yeah, and things like random dope ins line is roughness, polygrain boundaries. They still caused threshold voltage variations, especially for the really short channel transistors.
The smallest ones were most sensitive.
They really were needed very careful design, and all this complexity really flowed down into the physical design, the actual layout.
I bet more rules, tighter tolerances must have been tough.
It was. Designers maybe had less direct control over layout, and those optical proximity effects corner rounding slight misalignments, they caused matching errors.
So tiny manufacturing imperfections mattered more.
A lot. More strategies involve things like using only certain device widths for regularity. Considering stress from metal wires.
Above, it sounds like circuit design and physical layout had to become much more tightly integrated.
Absolutely planning the physical aspects early was key to avoiding problems later.
Okay, last point on robust design, packaging and interconnects, especially for those high power automotive modules where silicon meets the real world exactly.
Multi chip modules were common in EVSAGVS, and a huge issue was mechanical stress. Stress from what different materials expanding and contracting at different rates when the temperature changes, you know a CTE mismatch. Silicon expands differently than the ceramic substrate or the base plate.
Ah sot up and cooling down put strain on everything.
Big time, especially over the wide temperature range. Cars operate in like netteck of forty c up to really high temps.
And that affects the connections soldering wire bonds.
Definitely higher temps were tough on wire bonds they could lift off. They did lots of power cycling tests to check durability. Even the direct bond copper structures felt the strain from thermal cycles.
Sounds like material science was just as crucial as the chip design.
Here. It really was, and they were already looking ahead exploring things like metal carbon nanotube composites from what better thermal interface materials maybe even metallization. C and ts have amazing thermal and electrical conductivity way better than copper. Could lead to even more robust, high temp power electronics down the road.
Interesting glimpse into the future there. Okay, that wraps up robust design. Let's switch gears to our second topic. Sigma delta converters essential for higher precision analog to digital conversion.
Yeah, and the focus here was oft and on getting higher resolution your bandwidth but using less power. Constant innovation.
One area you highlighted was noise coupled delta sigma ADCs using noise to help.
That sounds backward, it does, right, but the idea is really clever. You take the quantization noise generated in one part of the modulator.
The unwanded stuff.
Right, and you strategically inject it somewhere else in loop. In certain architectures like feed forward ones, this could actually boost performance without needing extra op amps.
Huh, what's the catch?
Well, you usually sacrifice a bit of the maximum input signal range you can handle without distortion, so choosing the quantizer resolution carefully is key. Usually need like one extra bit than the modulator.
Order, so you're kind of using the noise against itself, but you can't push it too hard. Were there different ways to do this noise coupling.
Oh yeah, split modulators, noise canceling structures, noise coupled, time interleaved. That last one. NCTI looked pretty promising. Why is that it had this enhancement factor that improve things, and time interleaving made it simpler to implement. Plus it was less sensitive to mismatch errors between channels because it's suppressed noise around the niquist frequency.
But there was still a trade off sq and R versus robustness.
Always trade offs and analog design. But yeah, different ways to leverage the concept.
Okay. Another interesting idea, very low over sampling ratio sigma deltas isn't oversampling like the whole point of sigma delta.
It usually is, but at very low osrs they start competing head to head with niquist ADCs like pipeline ADCs. Really yeah, the sources suggest there's a crossover point where higher order sigma deltas can actually be lower order ones. Even with low osrs. You still get noise reduction even with an OSR of to say.
Three, surprising, so you're relying more on the heavy duty noise shaping even with fewer samples. How did they stack up against pipelines on power? That's often critical?
Good question. Pipelines sometimes use these half delaying stages, which could be less power efficient than masah shigma delta using full period integrators. Okay, but people were working on making pipelines more efficient too, swushowpams, sharing amplifiers, things like that, and incremental ADCs also perform will low osrs getting good resolution because they can handle bigger signals.
It feels like the lines between architectures were blurring a bit at these low osrs. Everyone borrowing ideas.
Kind of yeah, optimizing for performance and power.
Now what about compartor based switched capacitor sigma deltas using comparitors instead of op ams? Why do that.
Big advantage in nanoscale cmos Designing good op amps with low supply voltage just gets really hard. Comparators can be simpler, faster, potentially lower power.
Makes sense.
They explore different ways to build integrators with comparators. Pseudo differential looked good for high speed. It cleverly turns comparator delay into a common mode error, which is easier to deal with later.
So you trade the op AMS precision for the comparator speed and power benefits, then clean up them us elsewhere. What about that comparator delay? Did it cause problems?
It could cause some output voltage overshoot, maybe a DC offset, But since comparators are open loop you don't have the same stability worries as with opams and feedback. The key thing is just the delay time itself, which interestingly didn't depend much on the filter capacitor sizes.
Okay, and noise was still a factor obviously.
Oh yeah, thermal noise from switches, reference voltages. You still had to analyze all that to figure out the SNR, but it was definitely a viable path, especially for low power.
Then there was the really different idea VCO based ADCs voltage controlled oscillators.
Yeah, pretty novel. The VCO acts like a voltage to time converter. Combine that with the time to digital converter and you get noise shaping, even mismatch shaping.
But VCOs aren't perfectly linear, are they.
That's the main challenge. The relationship between input voltage and output frequency isn't straight. The trick was to use the phase of the VCO output as the key variable.
Phase.
Okay, theoretically that could get you really high SNDR over wide bandwidths, and the prototypes mentioned showed promising results backing up the theory.
So encoding voltage into frequency or phase a totally different way to digitize cool. Lastly, wide band continuous time multi bit delta sigmas using more than one bit in the quantizer.
That has advantages, big advantages. Multibit contizers ease the requirements on the op amps, especially their SLEW rate and they reduce the out of band quantization.
Noise leading to lower power.
Often yes, but the trade off is the DK in the feedback loop becomes more complex. You need dynamic element matching DEM to keep it.
Linear, right, got to make sure that this is accurate.
But despite that complexity, low OSR combined with multibit quantizers and DEM algorithms like DWA was becoming really popular for wideband stuff.
So trading some over sampling for multibit benefits and using DEM to fix the DT sounds like a smart compromise exactly.
And the performance figures reported were impressive high dynamic range high SNDR. They were using cascaded architectures, high speed decks, really pushing the envelope.
Clearly, Sigma delta was a hot area for innovation back then.
Absolutely just relentless efforts to get better performance, less power, more bandwidth, lots of creativity.
Okay, final topic, r FID radio frequency identification. Around twenty ten, this was really starting to break out of niche uses, wasn't it.
It really was. You know, it started way back tracking nuclear stuff than cows, but by twenty ten people were seriously looking at it for much broader things like what tagging High value items was a big one mentioned, fashion, fancy goods, electronics, huge potential for better inventory management. The key was the move towards open standards that was crucial for.
Getting scale from cows to couture. Sounds like the market was poised for growth, but maybe some hurdles remained.
For sure, technical issues like getting reliable reads in different environments, the cost both tags and readers, and figuring out who pays and who benefits the supply chain.
Yeah, the business side, but the.
Long term vision was much lower costs readers maybe two hundred, passive tags just a few cents. They even talk about chipless tags under a cent that was further out but revolutionary.
If it happened, Wow, that would make it truly everywhere. Retail and consumer goods were the big targets.
Expected to be the largest market. Yeah. UHF was seen as the main frequency for tracking objects, though HF had its niches like libraries.
And the trend was better performance, lower cost, making it essential for business.
That was the expectation, especially in Europe. But for that kind of widespread use, standards are absolutely vital.
Right, and the standardization effort had started way back isoie.
Yeah, JTC one, SC thirty one, double G four formed A ninety seven. Their goal was a common protocol for interoperability across the supply chain or really broad scope.
But before that it was more fragmented application specific standards mostly.
Yeah ANILID road tolls. Not much focus on broad tech based standards covering different frequencies, so maybe ANSI. In the US. A lot of early tech was proprietary, leading to closed systems, and UHF had some regulatory issues too, potential overlap with mobile phones in.
Some places, so a bit messy. Initially, it sounds like RFID standards had some catching up to do compared to say barcodes.
That's a key point from the sources. The barcode community had a deep understanding of applications in tech when their standards evolved. RFID was maybe ten twenty years behind in that sense, starting almost from scratch in terms of consensus.
Must have been hard getting everyone on the same page with all the different technologies.
Definitely, the first phase of ISO eighteen thousand tried to set up rules, maybe one protocol pre frequency, but there were just so many competing proprietary candidates.
What about the application side EPC Global had groups working on that.
Yeah, those were crucial. They worked on things like lookup services, yeah, the discovery service, supply chain tracking models, and importantly security and privacy analysis, building prototypes.
So practical implementation, not just the tech specs right.
And business groups focused on sectors like anti counterfeiting, pharma, apparel, food, running pilot projects to show the value any.
Cool examples of early smart object systems.
I mentioned smart shells for bookstores, remote servicing for heavy equipment using RFID to spot issues or manage parts, showing that potential beyond just tracking, and.
The performance requirements for logistics were getting pretty demanding. Read range speed.
Yeah, reading up to nine meters, reading whole pallettes fast like half a second to two seconds, needing new one hundred percent accuracy which meant more power, higher data rates, and people were already thinking about adding sensors.
To tag sensors like temperature shock.
Exactly, temperature, humidity pressure. Moving beyond just ID to collecting environmental data that needed more power and data capacity, of.
Course opens up a lot more possibilities. Okay, let's seme in on the super small stuff ultra small RFID chips. The hon chips, tiny chips and everyday objects. Sounds futuristic even now.
It really does. The goal was linking physical things to network information. Small cheap chips for anti counterfeiting product tracking.
Like that chip at the IGXPO point four milimeter square Yeah, two.
Point four or five getter herds one hundred and twenty eight bit ID and the trend was even smaller like Hatachi's sub point one millimeter chips.
Incredible like electronic dust. What's inside them.
Basically ROM for the ID one twenty eight bits like an IPv six address conceptually, and a rectifier circuit to harvest RF energy for power. Early ones skipped anti collision to save space.
And the antenna.
Some had it embedded right on the chip for two point four or five gilaers, or you could attach an external one for longer range using special films, making thin, flexible tags possible. They're also working on batch assembly to.
Cut costs, miniaturization driving everything right. So digging into the design of these passive tag ICs, what are the key building blocks?
You need the rectifier obviously to get power, a voltage regulator for stable supply, a demodulator to get data from the reader, memory for the ID, a modulator to send data back, usually.
Backscatter where flex the reader signal.
Right, it doesn't transmit its own and a clock generator for timing the.
Recifier seems critical for passive tags. How did they optimize that?
They use things like the Dixon equation modified to account for real world losses, capacitance, diode characteristics, load current frequency. It's a complex balancing act choosing the right number of stages matching the antenna impedance to grab as much power.
As possible, maximizing that energy scavenging. And once you have the raw power, you need stable voltage exactly.
First, a DC limitter for basic protection against too much voltage could be simple diodes or fancier transistor circuits for tighter control, especially with low voltage processes. Then a fine regulator for the precise voltage needed by the circuits.
And some tags needed to work at multiple frequencies.
Yeah, research into multi frequency rectifiers using coupling in switches to handle LFHF and UAHF. Even the clock oscillator had tight specs needed over one point nine middle hertz decent voltage swing, but using incredibly low power like under five hundred nano.
Wa amazing engineer ring in such tiny, simple looking tags. Okay, last piece of the RFID puzzle. Printed electronics a totally different way to make tags, potentially.
Game changing, using printing methods, often with organic materials, for low cost, large area, high volume production. Think beyond RFID two, smart packaging, flexible displays.
How does it work Layering materials.
Basically yeah, printing layers for substrate electrodes, semiconductor insulator building devices like thin film transistors.
DFTs, so printing circuits instead of etching silicon. How did printed transistors compared to siloton ones?
Qualitatively similar characteristics but generally much lower charge carrier mobility so slower less current capacity and performance varies a lot with materials and process but.
They could make working circuits.
Yeah, simple stuff like ring oscillators, even basic RFID transponders with rectifier clock data circuits. It was early days, though, Roadmaps highlighted printed rfid's potential, thin flexible, but also the limitations, especially performance, kids were right memory in UHF operation. First prototypes were being tested around two thousand and seven two.
Thousand and eight, so promising for ultra low cost flexible tags, but still maturing, and finally, what about making these organic tags compatible with EPC standards. That's crucial for supply chains.
Right, absolutely essential for organic tags to be widely adopted, they need to play nice the existing EPC infrastructure. Plastic tags already met some basic specs six four to ninety six bit IDs HF operation, but work was on going to get higher data rates closer to full EPC compatibility.
Using new transistor tech like dual gate otfts.
Yeah, exploring things like that to boost performance, get better gain and noise margines. In the logic, they showed a fifty kilo ortz transponder using penasine for mobility special masking techniques. Promising steps, but full EPC adherence for organic tags was still a major research goal.
It's clear RFID was booming in twenty ten, Silicon chips, shrinking, printed electronics emerging, all aimed at connecting the physical and digital worlds.
And what's really interesting connecting it all back is how these three air areas, Robust Design, Sigma, Delta, RFID were all deeply tied to the underlying semiconductor progress. Nanoscale CMOS was the engine driving opportunities but also creating challenges that cut across all these fields. It pushed innovation everywhere materials, circuits, design methods.
Okay, let's wrap up this steep dive. It's been quite a journey through analog circuit design. Circuit twenty ten, we saw the huge efforts in robust design handling extreme conditions, nanoscale effects.
We looked at the clever innovations in Sigma delta converters, pushing for better performance, lower.
Power, and we tracked the rise of RFID standardization, tiny silicon ships, the potential of printed electronics, all heading towards widespread use.
For me, the aha moments, We're seeing how engineers were getting smarter about managing variability and reliability at nanoscale, the really inventive architectures in Sigma deltas, and just watching RFID evolve from niche uses towards something potentially transformative, driven by both silicon and new materials.
And hopefully for you listening, this gives you a solid handle on these key trends and why they mattered without needing an engineering degree. We tried to hit the highlights and the implications, which.
Leads to a final thought, maybe considering all this progress back in twenty ten. How might these advancements, especially in robust electronics and pervasive tech like RFID, be shaping the devices we use now in how we interact with the world. What entirely new applications might have popped up because these technologies kept maturing and getting cheaper. Something to think about.